Research topics

The Real Time Systems group of IRCCyN works on the design and validation of real time systems. Within this main topic, I focus on the following topics:

Modeling and simulation of hardware execution plateforms for real-time systems

The goal is to model and simulate efficiently and accurately a hardware plateform. The simulator is able to execute the actual binary code of a real time application and provide an accurate execution time of the simulated software. To model the plateform, we are developing a Hardware Architecture Description Language called HARMLESS. From the HARMLESS description, a compiler generates an Instruction Set Simulator (ISS) or a Cycle Accurate Simulator (CAS). The CAS uses an automaton based model to simulate efficiently the pipeline of the processor. We work, Mikaël Briday and I, since 2006 on this topic and Rola Kassem defended its PhD thesis on 2010.

Further work includes the extension to multicore architectures, the extension to superscalar architectures and performance improvement.

We collaborate with Guillaume Savaton from ESEO.

Real-time operating systems

Trampoline had been developed in this topic and is now a mature real time operating system. Further work in this topic includes:

Both topics are currently supported by ANR RESPECTED

WCET computation using program slicing and real-time model checking

I collaborate with Franck Cassez on this project. Check this page for more Information.

Publications

SBBK-OCL-11
Guillaume Savaton, Jean-Luc Béchennec, Mikaël Briday and Rola Kassem. An Architecture Description Language for Embedded Hardware Platforms. In International Workshop on OCL and Textual Modelling (OCL 2011) June 2011.
BBA-SIES-11
Jean-Luc Béchennec, Mikaël Briday and Valère Alibert. Extending HARMLESS Architecture Description Language for Embedded Real-Time Systems Validation. In 6th IEEE International Symposium on Industrial Embedded Systems (SIES’11) June 2011.
BBFPJ-SIMUTOOLS-10
Jean-Luc Béchennec, Mikaël Briday, Sébastien Faucou, Florent Pavin and Fabien Juif. Viper: a lightweight approach to the simulation of distributed and embedded software. In 3rd International Conference on Simulation Tools and Techniques for Communications, Networks and Systems, SimuTools 2010 (acceptance rate 29%), March 2010.
KBBST-SIMUTOOLS-09
Rola Kassem, Mikaël Briday, Jean-Luc Béchennec, Guillaume Savaton and Yvon Trinquet. Instruction set simulator generation using harmless, a new hardware architecture description language. In 2nd International Conference on Simulation Tools and Techniques for Communications, Networks and Systems, SimuTools 2009 (acceptance rate 39%), March 2009.
KBBTS-MESM-09
Rola Kassem, Mikaël Briday, Jean-Luc Béchennec, Yvon Trinquet and Guillaume Savaton. Cycle accurate simulator generation using Harmless. In International Middle Eastern Multiconference on Simulation and Modelling (MESM'09), Eurosis, Beirut, Lebanon, September 2009.
KBBST-IMCSIT-08
Rola Kassem, Mikaël Briday, Jean-Luc Béchennec, Guillaume Savaton and Yvon Trinquet. Simulator generation using an automaton based pipeline model for timing analysis. In International Multiconference on Computer Science and Information Technology (IMCSIT'08), October 2008.
BBFT-ETFA-06
Jean-Luc Béchennec, Mikaël Briday, Sébastien Faucou, and Yvon Trinquet. Trampoline - an opensource implementation of the OSEK/VDX rtos specification. In 11th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA'06)}, September 2006.
BBT-JESA-06
Mikaël Briday, Jean-Luc Béchennec, and Yvon Trinquet. Retis: A real-time simulation platform. Journal Européen des Systèmes Automatisés (JESA), 40(8):819 to 846, 2006.

Software

Check RTS Software for other software from the Real Time System Group.